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Old 04-19-14, 12:18 PM   #15
wuck
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Join Date: Nov 2013
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Rich,

The FET circuit should work fine, but, the devil is in the details. Here are a few thoughts (without looking at data sheets) . . .

Vin must swing from 0V (off) to >>Vth to ensure the FET remains in the switch mode, not anywhere in the linear mode where the power dissipation can kill it. Sometimes a bipolar transistor is needed to drive the gate if your controller doesn't quite get to 0 volts. Pay close attention to rise and fall times here also, as a slow ramp will cause the FET to dissipate more power than you planned on while switching.

Another thing to watch is the open circuit (No load) voltage from your array, and the cold(ish) resistance of the tank heater. These can push the dissipation up when switching.

Make sure you do the math to check the device power dissipation in the "on" state as shown in your linked article. It's good practice to derate power dissipation specs by up to 50% for reliability purposes. The real key here is junction temperature, which can be derived from the data sheet and your circuit design. A good heat sink can help.

From a simple standpoint, no gate protection is required. However, you may get some inductive coupling from other power/control lines routed nearby, especially if they run next to inductive switched lines - like the compressor, or maybe a switched relay, or even long wire runs. These spikes can most likely be clamped with diodes on the gate, taking advantage of the input resistor (Rin) to provide the impedance to drop that spike when the protection diode conducts.

Maybe some of the above can help figure out why your DC SSR failed?

Pat
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